%0 Journal Article %1 journals/jssc/ChaeLS08 %A Chae, Moo Sung %A Liu, Wentai %A Sivaprakasam, Mohanasankar %D 2008 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 1931-1939 %T Design Optimization for Integrated Neural Recording Systems. %U http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#ChaeLS08 %V 43

@article{journals/jssc/ChaeLS08, added-at = {2020-08-30T00:00:00.000+0200}, author = {Chae, Moo Sung and Liu, Wentai and Sivaprakasam, Mohanasankar}, biburl = {https://www.bibsonomy.org/bibtex/2e0472d724c083ad734524ccb12bab2ee/dblp}, ee = {https://doi.org/10.1109/JSSC.2008.2001877}, interhash = {aaac50db92ab1bef43f8b5ee94bbdfac}, intrahash = {e0472d724c083ad734524ccb12bab2ee}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = {1931-1939}, timestamp = {2020-08-31T11:41:23.000+0200}, title = {Design Optimization for Integrated Neural Recording Systems.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#ChaeLS08}, volume = 43, year = 2008 }