%0 Conference Paper %1 conf/ismvl/NakataniHK06 %A Nakatani, Yoshihiro %A Hariyama, Masanori %A Kameyama, Michitaka %B ISMVL %D 2006 %I IEEE Computer Society %K dblp %P 17 %T Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals. %U http://dblp.uni-trier.de/db/conf/ismvl/ismvl2006.html#NakataniHK06 %@ 0-7695-2532-6

@inproceedings{conf/ismvl/NakataniHK06, added-at = {2023-03-23T00:00:00.000+0100}, author = {Nakatani, Yoshihiro and Hariyama, Masanori and Kameyama, Michitaka}, biburl = {https://www.bibsonomy.org/bibtex/21ac28db7b09620185cc97f4c38b0f93d/dblp}, booktitle = {ISMVL}, crossref = {conf/ismvl/2006}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISMVL.2006.40}, interhash = {ab6221e8d565297c6e65bce2542228ad}, intrahash = {1ac28db7b09620185cc97f4c38b0f93d}, isbn = {0-7695-2532-6}, keywords = {dblp}, pages = 17, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T17:18:12.000+0200}, title = {Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals.}, url = {http://dblp.uni-trier.de/db/conf/ismvl/ismvl2006.html#NakataniHK06}, year = 2006 }