%0 Conference Paper %1 conf/doceis/XavierBG23 %A Xavier, João %A Barquinha, Pedro %A Goes, João %B DoCEIS %D 2023 %E Camarinha-Matos, Luis M. %E Ferrada, Filipa %I Springer %K dblp %P 279-289 %T Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology. %U http://dblp.uni-trier.de/db/conf/doceis/doceis2023.html#XavierBG23 %V 678 %@ 978-3-031-36007-7

@inproceedings{conf/doceis/XavierBG23, added-at = {2024-05-07T00:00:00.000+0200}, author = {Xavier, João and Barquinha, Pedro and Goes, João}, biburl = {https://www.bibsonomy.org/bibtex/2b30deb4e5b2bcae0cab1bb5ba205cfea/dblp}, booktitle = {DoCEIS}, crossref = {conf/doceis/2023}, editor = {Camarinha-Matos, Luis M. and Ferrada, Filipa}, ee = {https://doi.org/10.1007/978-3-031-36007-7_21}, interhash = {abbdf463933883d472fd2b8cae75d9b2}, intrahash = {b30deb4e5b2bcae0cab1bb5ba205cfea}, isbn = {978-3-031-36007-7}, keywords = {dblp}, pages = {279-289}, publisher = {Springer}, series = {IFIP Advances in Information and Communication Technology}, timestamp = {2024-05-13T10:05:01.000+0200}, title = {Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology.}, url = {http://dblp.uni-trier.de/db/conf/doceis/doceis2023.html#XavierBG23}, volume = 678, year = 2023 }