%0 Conference Paper %1 conf/ats/HatayamaNS02 %A Hatayama, Kazumi %A Nakao, Michinobu %A Sato, Yasuo %B Asian Test Symposium %D 2002 %I IEEE Computer Society %K dblp %P 292-297 %T At-Speed Built-in Test for Logic Circuits with Multiple Clocks. %U http://dblp.uni-trier.de/db/conf/ats/ats2002.html#HatayamaNS02 %@ 0-7695-1825-7

@inproceedings{conf/ats/HatayamaNS02, added-at = {2023-03-24T00:00:00.000+0100}, author = {Hatayama, Kazumi and Nakao, Michinobu and Sato, Yasuo}, biburl = {https://www.bibsonomy.org/bibtex/23f25811fd3fa3d6625da8dcbe6754c02/dblp}, booktitle = {Asian Test Symposium}, crossref = {conf/ats/2002}, ee = {https://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181726}, interhash = {af47bf06ca8f6f3ae38f2ab242ff3c0b}, intrahash = {3f25811fd3fa3d6625da8dcbe6754c02}, isbn = {0-7695-1825-7}, keywords = {dblp}, pages = {292-297}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T06:35:29.000+0200}, title = {At-Speed Built-in Test for Logic Circuits with Multiple Clocks.}, url = {http://dblp.uni-trier.de/db/conf/ats/ats2002.html#HatayamaNS02}, year = 2002 }