%0 Journal Article %1 journals/jsa/PenalbaMH02 %A Peñalba, Olga %A Mendías, José M. %A Hermida, Román %D 2002 %J J. Syst. Archit. %K dblp %N 12 %P 959-975 %T A global approach to improve conditional hardware reuse in high-level synthesis. %U http://dblp.uni-trier.de/db/journals/jsa/jsa47.html#PenalbaMH02 %V 47

@article{journals/jsa/PenalbaMH02, added-at = {2020-05-19T00:00:00.000+0200}, author = {Peñalba, Olga and Mendías, José M. and Hermida, Román}, biburl = {https://www.bibsonomy.org/bibtex/274c6213c56949edc096a6488288802c5/dblp}, ee = {https://doi.org/10.1016/S1383-7621(02)00054-1}, interhash = {af5520c244f8731d1cef3bf74dcf45e6}, intrahash = {74c6213c56949edc096a6488288802c5}, journal = {J. Syst. Archit.}, keywords = {dblp}, number = 12, pages = {959-975}, timestamp = {2020-05-20T11:50:30.000+0200}, title = {A global approach to improve conditional hardware reuse in high-level synthesis.}, url = {http://dblp.uni-trier.de/db/journals/jsa/jsa47.html#PenalbaMH02}, volume = 47, year = 2002 }