%0 Journal Article %1 journals/tcad/BaranwalUSK21 %A Baranwal, Akhil Raj %A Ullah, Salim %A Sahoo, Siva Satyendra %A Kumar, Akash %D 2021 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 9 %P 1754-1767 %T ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. %U http://dblp.uni-trier.de/db/journals/tcad/tcad40.html#BaranwalUSK21 %V 40

@article{journals/tcad/BaranwalUSK21, added-at = {2021-09-01T00:00:00.000+0200}, author = {Baranwal, Akhil Raj and Ullah, Salim and Sahoo, Siva Satyendra and Kumar, Akash}, biburl = {https://www.bibsonomy.org/bibtex/2ccfc8758aab684b5659cef2eca1417fd/dblp}, ee = {https://doi.org/10.1109/TCAD.2020.3028350}, interhash = {afc07a345f8669940d49688a6abc3ffe}, intrahash = {ccfc8758aab684b5659cef2eca1417fd}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 9, pages = {1754-1767}, timestamp = {2024-04-08T19:47:28.000+0200}, title = {ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad40.html#BaranwalUSK21}, volume = 40, year = 2021 }