%0 Conference Paper %1 conf/vlsid/BajwaOI93 %A Bajwa, Raminder Singh %A Owens, Robert Michael %A Irwin, Mary Jane %B VLSI Design %D 1993 %I IEEE Computer Society %K dblp %P 250-255 %T A Massively Parallel, Micro-Grained VLSI Architecture. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#BajwaOI93 %@ 0-8186-3180-5

@inproceedings{conf/vlsid/BajwaOI93, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bajwa, Raminder Singh and Owens, Robert Michael and Irwin, Mary Jane}, biburl = {https://www.bibsonomy.org/bibtex/2815327a596055a1f9af224bcd089330f/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1993}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1993.669690}, interhash = {b0a0f1ad329d8825a349904d857c17c1}, intrahash = {815327a596055a1f9af224bcd089330f}, isbn = {0-8186-3180-5}, keywords = {dblp}, pages = {250-255}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:46:57.000+0200}, title = {A Massively Parallel, Micro-Grained VLSI Architecture.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#BajwaOI93}, year = 1993 }