%0 Conference Paper %1 conf/iscas/XiaoCQPW022 %A Xiao, Kanglin %A Cui, Xiaoxin %A Qiao, Xin %A Pan, Nanbing %A Wang, Xin'an %A Wang, Yuan %B ISCAS %D 2022 %I IEEE %K dblp %P 2551-2555 %T A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#XiaoCQPW022 %@ 978-1-6654-8485-5

@inproceedings{conf/iscas/XiaoCQPW022, added-at = {2022-11-17T00:00:00.000+0100}, author = {Xiao, Kanglin and Cui, Xiaoxin and Qiao, Xin and Pan, Nanbing and Wang, Xin'an and Wang, Yuan}, biburl = {https://www.bibsonomy.org/bibtex/244b1dee13169e32a1cd3d294a5322333/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2022}, ee = {https://doi.org/10.1109/ISCAS48785.2022.9937963}, interhash = {b1c37fee3f13cc185027988f40aae2ff}, intrahash = {44b1dee13169e32a1cd3d294a5322333}, isbn = {978-1-6654-8485-5}, keywords = {dblp}, pages = {2551-2555}, publisher = {IEEE}, timestamp = {2024-04-09T21:29:44.000+0200}, title = {A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#XiaoCQPW022}, year = 2022 }