%0 Conference Paper %1 conf/vlsid/KumarMPR03 %A Kumar, D. Vinay %A Mohapatra, Nihar R. %A Patil, Mahesh B. %A Rao, V. Ramgopal %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 128- %T Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#KumarMPR03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/KumarMPR03, added-at = {2023-03-24T00:00:00.000+0100}, author = {Kumar, D. Vinay and Mohapatra, Nihar R. and Patil, Mahesh B. and Rao, V. Ramgopal}, biburl = {https://www.bibsonomy.org/bibtex/2480bcf48d89d975f9afb02ccb407e0a5/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183126}, interhash = {b38340d5f962edacbb51ecd31b39b690}, intrahash = {480bcf48d89d975f9afb02ccb407e0a5}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {128-}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:49.000+0200}, title = {Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#KumarMPR03}, year = 2003 }