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%0 Conference Paper
%1 conf/dac/AugustinGHLS88
%A Augustin, Larry M.
%A Gennart, Benoit A.
%A Huh, Youm
%A Luckham, David C.
%A Stanculescu, Alec G.
%B DAC
%D 1988
%E Shaklee, Dennis W.
%E Newton, A. Richard
%I ACM
%K dblp
%P 48-53
%T Verification of VHDL Designs Using VAL.
%U http://dblp.uni-trier.de/db/conf/dac/dac88.html#AugustinGHLS88
@inproceedings{conf/dac/AugustinGHLS88,
added-at = {2017-03-16T00:00:00.000+0100},
author = {Augustin, Larry M. and Gennart, Benoit A. and Huh, Youm and Luckham, David C. and Stanculescu, Alec G.},
biburl = {https://www.bibsonomy.org/bibtex/2976d49dd7096fb482ef1860054c78094/dblp},
booktitle = {DAC},
crossref = {conf/dac/1988},
editor = {Shaklee, Dennis W. and Newton, A. Richard},
ee = {http://portal.acm.org/citation.cfm?id=285730.285737},
interhash = {ba853272cab2fd776201d1ea4e1ae7fe},
intrahash = {976d49dd7096fb482ef1860054c78094},
keywords = {dblp},
pages = {48-53},
publisher = {ACM},
timestamp = {2017-03-17T11:39:21.000+0100},
title = {Verification of VHDL Designs Using VAL.},
url = {http://dblp.uni-trier.de/db/conf/dac/dac88.html#AugustinGHLS88},
year = 1988
}
