Inproceedings,
Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integration.
V. Deshpande, H. Hahn, V. Djara, E. O'Connor, D. Caimi, M. Sousa, J. Fompeyrine, and L. Czornomaz.ESSDERC, page 244-247. IEEE, (2017)
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- conf/essderc/DeshpandeHDOCSF17
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- inproceedings
- booktitle
- ESSDERC
- year
- 2017
- pages
- 244-247
- publisher
- IEEE
- crossref
- conf/essderc/2017
- ee
- https://doi.org/10.1109/ESSDERC.2017.8066637
- isbn
- 978-1-5090-5978-2
- url
- http://dblp.uni-trier.de/db/conf/essderc/essderc2017.html#DeshpandeHDOCSF17
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%1 conf/essderc/DeshpandeHDOCSF17
%A Deshpande, V.
%A Hahn, Herwig
%A Djara, V.
%A O'Connor, E.
%A Caimi, Daniele
%A Sousa, Marilyne
%A Fompeyrine, Jean
%A Czornomaz, L.
%B ESSDERC
%D 2017
%I IEEE
%K dblp
%P 244-247
%T Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integration.
%U http://dblp.uni-trier.de/db/conf/essderc/essderc2017.html#DeshpandeHDOCSF17
%@ 978-1-5090-5978-2
@inproceedings{conf/essderc/DeshpandeHDOCSF17,
added-at = {2020-03-30T00:00:00.000+0200},
author = {Deshpande, V. and Hahn, Herwig and Djara, V. and O'Connor, E. and Caimi, Daniele and Sousa, Marilyne and Fompeyrine, Jean and Czornomaz, L.},
biburl = {https://www.bibsonomy.org/bibtex/2f33cbe44c21894dc8444a2d2cfc3ccf7/dblp},
booktitle = {ESSDERC},
crossref = {conf/essderc/2017},
ee = {https://doi.org/10.1109/ESSDERC.2017.8066637},
interhash = {bdef60b5758f7470fd008860ef9946f0},
intrahash = {f33cbe44c21894dc8444a2d2cfc3ccf7},
isbn = {978-1-5090-5978-2},
keywords = {dblp},
pages = {244-247},
publisher = {IEEE},
timestamp = {2020-03-31T11:43:37.000+0200},
title = {Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integration.},
url = {http://dblp.uni-trier.de/db/conf/essderc/essderc2017.html#DeshpandeHDOCSF17},
year = 2017
}