%0 Conference Paper %1 conf/isqed/YanoHS13 %A Yano, Ken %A Hayashida, Takanori %A Sato, Toshinori %B ISQED %D 2013 %I IEEE %K dblp %P 373-378 %T Improving timing error tolerance without impact on chip area and power consumption. %U http://dblp.uni-trier.de/db/conf/isqed/isqed2013.html#YanoHS13 %@ 978-1-4673-4951-2

@inproceedings{conf/isqed/YanoHS13, added-at = {2013-06-10T00:00:00.000+0200}, author = {Yano, Ken and Hayashida, Takanori and Sato, Toshinori}, biburl = {https://www.bibsonomy.org/bibtex/2d3df8038883c5a5ab3d669f1cce3d53f/dblp}, booktitle = {ISQED}, crossref = {conf/isqed/2013}, ee = {http://dx.doi.org/10.1109/ISQED.2013.6523638}, interhash = {bf5f54edfe19e0493d9c1d3c714fc825}, intrahash = {d3df8038883c5a5ab3d669f1cce3d53f}, isbn = {978-1-4673-4951-2}, keywords = {dblp}, pages = {373-378}, publisher = {IEEE}, timestamp = {2013-08-13T14:46:04.000+0200}, title = {Improving timing error tolerance without impact on chip area and power consumption.}, url = {http://dblp.uni-trier.de/db/conf/isqed/isqed2013.html#YanoHS13}, year = 2013 }