%0 Conference Paper %1 conf/fpl/SklyarovMLMOK98 %A Sklyarov, Valery %A Monteiro, Ricardo Sal %A Lau, Nuno %A Melo, Andreia %A Oliveira, Arnaldo S. R. %A Kondratjuk, Konstantin %B FPL %D 1998 %E Hartenstein, Reiner W. %E Keevallik, Andres %I Springer %K dblp %P 19-28 %T Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs. %U http://dblp.uni-trier.de/db/conf/fpl/fpl1998.html#SklyarovMLMOK98 %V 1482 %@ 3-540-64948-4

@inproceedings{conf/fpl/SklyarovMLMOK98, added-at = {2017-08-09T00:00:00.000+0200}, author = {Sklyarov, Valery and Monteiro, Ricardo Sal and Lau, Nuno and Melo, Andreia and Oliveira, Arnaldo S. R. and Kondratjuk, Konstantin}, biburl = {https://www.bibsonomy.org/bibtex/29938b02c3cf746c4a81743bc123af93c/dblp}, booktitle = {FPL}, crossref = {conf/fpl/1998}, editor = {Hartenstein, Reiner W. and Keevallik, Andres}, ee = {https://doi.org/10.1007/BFb0055229}, interhash = {c52ee839c197b4f86607638459b87acc}, intrahash = {9938b02c3cf746c4a81743bc123af93c}, isbn = {3-540-64948-4}, keywords = {dblp}, pages = {19-28}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2017-08-10T11:38:38.000+0200}, title = {Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl1998.html#SklyarovMLMOK98}, volume = 1482, year = 1998 }