%0 Journal Article %1 journals/tcad/CarterHW88 %A Carter, Larry %A Huisman, Leendert M. %A Williams, Tom W. %D 1988 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 1 %P 38-49 %T TRIM: testability range by ignoring the memory. %U http://dblp.uni-trier.de/db/journals/tcad/tcad7.html#CarterHW88 %V 7

@article{journals/tcad/CarterHW88, added-at = {2020-09-24T00:00:00.000+0200}, author = {Carter, Larry and Huisman, Leendert M. and Williams, Tom W.}, biburl = {https://www.bibsonomy.org/bibtex/2a6c2d3ffc96e4d1868ec4041f9e45899/dblp}, ee = {https://doi.org/10.1109/43.3128}, interhash = {ccdd7f62750d4ba006c6d5691e16b9ed}, intrahash = {a6c2d3ffc96e4d1868ec4041f9e45899}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 1, pages = {38-49}, timestamp = {2020-09-25T11:49:34.000+0200}, title = {TRIM: testability range by ignoring the memory.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad7.html#CarterHW88}, volume = 7, year = 1988 }