%0 Conference Paper %1 conf/pdpta/TateOSSUAWNN06 %A Tate, Ippei %A Ogasawara, Yoshiyasu %A Sato, Mikiko %A Sasada, Koichi %A Uchikura, Kaname %A Asano, Kazunari %A Watanabe, Satoshi %A Namiki, Mitaro %A Nakajo, Hironori %B PDPTA %D 2006 %E Arabnia, Hamid R. %I CSREA Press %K dblp %P 909-915 %T A Model of Implementable SMT Processor on FPGA. %U http://dblp.uni-trier.de/db/conf/pdpta/pdpta2006-2.html#TateOSSUAWNN06 %@ 1-932415-87-4

@inproceedings{conf/pdpta/TateOSSUAWNN06, added-at = {2006-11-28T00:00:00.000+0100}, author = {Tate, Ippei and Ogasawara, Yoshiyasu and Sato, Mikiko and Sasada, Koichi and Uchikura, Kaname and Asano, Kazunari and Watanabe, Satoshi and Namiki, Mitaro and Nakajo, Hironori}, biburl = {https://www.bibsonomy.org/bibtex/26e339b6b278ad4eb8714f60c1faedccb/dblp}, booktitle = {PDPTA}, crossref = {conf/pdpta/2006-2}, date = {2006-11-28}, description = {dblp}, editor = {Arabnia, Hamid R.}, interhash = {cd929ef4f8fec4d1aaddd4c98b4fbd8a}, intrahash = {6e339b6b278ad4eb8714f60c1faedccb}, isbn = {1-932415-87-4}, keywords = {dblp}, pages = {909-915}, publisher = {CSREA Press}, timestamp = {2006-11-28T00:00:00.000+0100}, title = {A Model of Implementable SMT Processor on FPGA.}, url = {http://dblp.uni-trier.de/db/conf/pdpta/pdpta2006-2.html#TateOSSUAWNN06}, year = 2006 }