%0 Conference Paper %1 conf/reconfig/RogersKS17 %A Rogers, Paul %A Kavasseri, Rajesh %A Smith, Scott C. %B ReConFig %D 2017 %I IEEE %K dblp %P 1-6 %T An FPGA-in-the-loop approach for HDL motor controller verification. %U http://dblp.uni-trier.de/db/conf/reconfig/reconfig2017.html#RogersKS17 %@ 978-1-5386-3797-5

@inproceedings{conf/reconfig/RogersKS17, added-at = {2018-11-02T00:00:00.000+0100}, author = {Rogers, Paul and Kavasseri, Rajesh and Smith, Scott C.}, biburl = {https://www.bibsonomy.org/bibtex/29d207e877e79d872ab29c6004706299c/dblp}, booktitle = {ReConFig}, crossref = {conf/reconfig/2017}, ee = {https://doi.org/10.1109/RECONFIG.2017.8279774}, interhash = {cf98018dca94ae9d6bfee41be49b16df}, intrahash = {9d207e877e79d872ab29c6004706299c}, isbn = {978-1-5386-3797-5}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2019-10-17T15:40:21.000+0200}, title = {An FPGA-in-the-loop approach for HDL motor controller verification.}, url = {http://dblp.uni-trier.de/db/conf/reconfig/reconfig2017.html#RogersKS17}, year = 2017 }