%0 Conference Paper %1 conf/dac/ZhangCTL09 %A Zhang, Hong %A Chen, Tsung-Hao %A Ting, Ming Yuan %A Li, Xin %B DAC %D 2009 %I ACM %K dblp %P 386-389 %T Efficient design-specific worst-case corner extraction for integrated circuits. %U http://dblp.uni-trier.de/db/conf/dac/dac2009.html#ZhangCTL09 %@ 978-1-60558-497-3

@inproceedings{conf/dac/ZhangCTL09, added-at = {2018-11-06T00:00:00.000+0100}, author = {Zhang, Hong and Chen, Tsung-Hao and Ting, Ming Yuan and Li, Xin}, biburl = {https://www.bibsonomy.org/bibtex/2245a3db189c4bae2fda2f7104f12719a/dblp}, booktitle = {DAC}, crossref = {conf/dac/2009}, ee = {https://doi.org/10.1145/1629911.1630013}, interhash = {d1e43e7f819e3a918ec4202186bcc499}, intrahash = {245a3db189c4bae2fda2f7104f12719a}, isbn = {978-1-60558-497-3}, keywords = {dblp}, pages = {386-389}, publisher = {ACM}, timestamp = {2018-11-07T15:12:12.000+0100}, title = {Efficient design-specific worst-case corner extraction for integrated circuits.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2009.html#ZhangCTL09}, year = 2009 }