%0 Conference Paper %1 conf/rsp/HeathT01 %A Heath, J. Robert %A Tan, Andrew %B IEEE International Workshop on Rapid System Prototyping %D 2001 %I IEEE Computer Society %K dblp %P 128-135 %T Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture. %U http://dblp.uni-trier.de/db/conf/rsp/rsp2001.html#HeathT01 %@ 0-7695-1206-2

@inproceedings{conf/rsp/HeathT01, added-at = {2023-03-23T00:00:00.000+0100}, author = {Heath, J. Robert and Tan, Andrew}, biburl = {https://www.bibsonomy.org/bibtex/28dff7cef485044e04681dd7845db09c9/dblp}, booktitle = {IEEE International Workshop on Rapid System Prototyping}, crossref = {conf/rsp/2001}, ee = {https://doi.ieeecomputersociety.org/10.1109/IWRSP.2001.933850}, interhash = {d48ea0c2895f31d290f2a2840d33f08e}, intrahash = {8dff7cef485044e04681dd7845db09c9}, isbn = {0-7695-1206-2}, keywords = {dblp}, pages = {128-135}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T18:07:27.000+0200}, title = {Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture.}, url = {http://dblp.uni-trier.de/db/conf/rsp/rsp2001.html#HeathT01}, year = 2001 }