%0 Conference Paper %1 conf/aspdac/HuXFTLF24 %A Hu, Yihong %A Xu, Nuo %A Feng, Chaochao %A Tong, Wei %A Liu, Kang %A Fang, Liang %B ASPDAC %D 2024 %I IEEE %K dblp %P 805-811 %T LOSSS-Logic Synthesis based on Several Stateful logic gates for high time-efficient computing. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2024.html#HuXFTLF24 %@ 979-8-3503-9354-5

@inproceedings{conf/aspdac/HuXFTLF24, added-at = {2024-08-22T00:00:00.000+0200}, author = {Hu, Yihong and Xu, Nuo and Feng, Chaochao and Tong, Wei and Liu, Kang and Fang, Liang}, biburl = {https://www.bibsonomy.org/bibtex/29a10ff2af6f6b7c516525ef67bec2540/dblp}, booktitle = {ASPDAC}, crossref = {conf/aspdac/2024}, ee = {https://doi.org/10.1109/ASP-DAC58780.2024.10473849}, interhash = {d4b53f9ef89cf942ecb85e7ceee443a8}, intrahash = {9a10ff2af6f6b7c516525ef67bec2540}, isbn = {979-8-3503-9354-5}, keywords = {dblp}, pages = {805-811}, publisher = {IEEE}, timestamp = {2024-08-26T07:36:26.000+0200}, title = {LOSSS-Logic Synthesis based on Several Stateful logic gates for high time-efficient computing.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2024.html#HuXFTLF24}, year = 2024 }