%0 Conference Paper %1 conf/cicc/SanticcioliMLSL19 %A Santiccioli, Alessio %A Mercandelli, Mario %A Lacaita, Andrea L. %A Samori, Carlo %A Levantino, Salvatore %B CICC %D 2019 %I IEEE %K dblp %P 1-4 %T A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power. %U http://dblp.uni-trier.de/db/conf/cicc/cicc2019.html#SanticcioliMLSL19 %@ 978-1-5386-9395-7

@inproceedings{conf/cicc/SanticcioliMLSL19, added-at = {2022-01-03T00:00:00.000+0100}, author = {Santiccioli, Alessio and Mercandelli, Mario and Lacaita, Andrea L. and Samori, Carlo and Levantino, Salvatore}, biburl = {https://www.bibsonomy.org/bibtex/296a114cf6aa5c4837b21b3f022934604/dblp}, booktitle = {CICC}, crossref = {conf/cicc/2019}, ee = {https://doi.org/10.1109/CICC.2019.8780235}, interhash = {d5df2bffcb23da4c6d505a1ff8adfd30}, intrahash = {96a114cf6aa5c4837b21b3f022934604}, isbn = {978-1-5386-9395-7}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-10T22:10:48.000+0200}, title = {A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power.}, url = {http://dblp.uni-trier.de/db/conf/cicc/cicc2019.html#SanticcioliMLSL19}, year = 2019 }