%0 Journal Article %1 journals/taco/XiongHJY16 %A Xiong, Dongliang %A Huang, Kai %A Jiang, Xiaowen %A Yan, Xiaolang %D 2016 %J ACM Trans. Archit. Code Optim. %K dblp %N 4 %P 42:1-42:26 %T Memory Access Scheduling Based on Dynamic Multilevel Priority in Shared DRAM Systems. %U http://dblp.uni-trier.de/db/journals/taco/taco13.html#XiongHJY16 %V 13

@article{journals/taco/XiongHJY16, added-at = {2023-05-12T00:00:00.000+0200}, author = {Xiong, Dongliang and Huang, Kai and Jiang, Xiaowen and Yan, Xiaolang}, biburl = {https://www.bibsonomy.org/bibtex/219fda8e0f68691743d3e7ef3ef1c142a/dblp}, ee = {https://doi.org/10.1145/3007647}, interhash = {d64176b8f7fce729904ada20d5e0b812}, intrahash = {19fda8e0f68691743d3e7ef3ef1c142a}, journal = {ACM Trans. Archit. Code Optim.}, keywords = {dblp}, number = 4, pages = {42:1-42:26}, timestamp = {2024-04-08T20:07:18.000+0200}, title = {Memory Access Scheduling Based on Dynamic Multilevel Priority in Shared DRAM Systems.}, url = {http://dblp.uni-trier.de/db/journals/taco/taco13.html#XiongHJY16}, volume = 13, year = 2016 }