%0 Conference Paper %1 conf/vlsit/YangWSYYWCLTCH22 %A Yang, Chang-Feng %A Wu, Chun-Yu %A Shih, Meng-Chun %A Yang, Ming-Ta %A Yang, Ming-Han %A Wu, Yu-Tien %A Chien, Ta-Chun %A Lai, Chih-Wei %A Tsai, Shih-Chi %A Chu, Wen-Ting %A Hung, Arthur %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 318-319 %T Demonstration of High Endurance Capability on Mega-Bit RRAM Macro and Model of ppm Level Failures. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YangWSYYWCLTCH22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/YangWSYYWCLTCH22, added-at = {2022-08-04T00:00:00.000+0200}, author = {Yang, Chang-Feng and Wu, Chun-Yu and Shih, Meng-Chun and Yang, Ming-Ta and Yang, Ming-Han and Wu, Yu-Tien and Chien, Ta-Chun and Lai, Chih-Wei and Tsai, Shih-Chi and Chu, Wen-Ting and Hung, Arthur}, biburl = {https://www.bibsonomy.org/bibtex/2b325398a6571f68210cedfa99a4d2706/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830374}, interhash = {d67f936a2eed45b02973b8f3e57ab9e2}, intrahash = {b325398a6571f68210cedfa99a4d2706}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {318-319}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {Demonstration of High Endurance Capability on Mega-Bit RRAM Macro and Model of ppm Level Failures.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#YangWSYYWCLTCH22}, year = 2022 }