%0 Conference Paper %1 conf/vlsit/WangYXBLBJZTGSZ23 %A Wang, Song %A Yu, Bing %A Xiao, Wenwu %A Bai, Fujun %A Long, Xiaodong %A Bai, Liang %A Jia, Xuerong %A Zuo, Fengguo %A Tan, Jie %A Guo, Yixin %A Sun, Peng %A Zhou, Jun %A Zhan, Qiong %A Hu, Sheng %A Zhou, Yu %A Kang, Yi %A Ren, Qiwei %A Jiang, Xiping %B VLSI Technology and Circuits %D 2023 %I IEEE %K dblp %P 1-2 %T A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#WangYXBLBJZTGSZ23 %@ 978-4-86348-806-9

@inproceedings{conf/vlsit/WangYXBLBJZTGSZ23, added-at = {2024-05-07T00:00:00.000+0200}, author = {Wang, Song and Yu, Bing and Xiao, Wenwu and Bai, Fujun and Long, Xiaodong and Bai, Liang and Jia, Xuerong and Zuo, Fengguo and Tan, Jie and Guo, Yixin and Sun, Peng and Zhou, Jun and Zhan, Qiong and Hu, Sheng and Zhou, Yu and Kang, Yi and Ren, Qiwei and Jiang, Xiping}, biburl = {https://www.bibsonomy.org/bibtex/298a3eb82ae98c8f178878667c47247cf/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2023}, ee = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185427}, interhash = {db9959345741061d05c6ee90f31ad6c2}, intrahash = {98a3eb82ae98c8f178878667c47247cf}, isbn = {978-4-86348-806-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-05-13T08:57:29.000+0200}, title = {A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#WangYXBLBJZTGSZ23}, year = 2023 }