Inproceedings,
Floorplanning challenges in early chip planning.
J. Shin, J. Darringer, G. Luo, M. Aharoni, A. Lvov, G. Nam, and M. Healy.SoCC, page 388-393. IEEE, (2011)
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- BibTeX key
- conf/socc/ShinDLALNH11
- entry type
- inproceedings
- booktitle
- SoCC
- year
- 2011
- pages
- 388-393
- publisher
- IEEE
- crossref
- conf/socc/2011
- ee
- http://dx.doi.org/10.1109/SOCC.2011.6085096
- isbn
- 978-1-4577-1616-4
- url
- http://dblp.uni-trier.de/db/conf/socc/socc2011.html#ShinDLALNH11
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- please select -%0 Conference Paper
%1 conf/socc/ShinDLALNH11
%A Shin, Jeonghee
%A Darringer, John A.
%A Luo, Guojie
%A Aharoni, Merav
%A Lvov, Alexey
%A Nam, Gi-Joon
%A Healy, Michael B.
%B SoCC
%D 2011
%I IEEE
%K dblp
%P 388-393
%T Floorplanning challenges in early chip planning.
%U http://dblp.uni-trier.de/db/conf/socc/socc2011.html#ShinDLALNH11
%@ 978-1-4577-1616-4
@inproceedings{conf/socc/ShinDLALNH11,
added-at = {2011-11-24T00:00:00.000+0100},
author = {Shin, Jeonghee and Darringer, John A. and Luo, Guojie and Aharoni, Merav and Lvov, Alexey and Nam, Gi-Joon and Healy, Michael B.},
biburl = {https://www.bibsonomy.org/bibtex/279d8e7cafc2e90e3a9a49e74a0aade49/dblp},
booktitle = {SoCC},
crossref = {conf/socc/2011},
ee = {http://dx.doi.org/10.1109/SOCC.2011.6085096},
interhash = {de7e98ca769b1191bc593ab1da1ebb14},
intrahash = {79d8e7cafc2e90e3a9a49e74a0aade49},
isbn = {978-1-4577-1616-4},
keywords = {dblp},
pages = {388-393},
publisher = {IEEE},
timestamp = {2013-01-09T11:39:28.000+0100},
title = {Floorplanning challenges in early chip planning.},
url = {http://dblp.uni-trier.de/db/conf/socc/socc2011.html#ShinDLALNH11},
year = 2011
}