,
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.
P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, C. Tortolero, I. Miro-Panades, G. Moritz, J. Durupt, C. Bernard, D. Varreau, J. Pontes, S. Thuries, D. Coriat, M. Harrand, D. Dutoit, D. Lattard, L. Arnaud, J. Charbonnier, P. Coudrain, A. Garnier, F. Berger, A. Gueugnot, A. Greiner, Q. Meunier, A. Farcy, A. Arriordaz, S. Cheramy, и F. Clermidy.IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)
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- journals/jssc/VivetGTPTMMDBVP21
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- article
- год
- 2021
- журнал
- IEEE J. Solid State Circuits
- номер
- 1
- страницы
- 79-97
- том
- 56
- ee
- https://doi.org/10.1109/JSSC.2020.3036341
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- http://dblp.uni-trier.de/db/journals/jssc/jssc56.html#VivetGTPTMMDBVP21
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%0 Journal Article
%1 journals/jssc/VivetGTPTMMDBVP21
%A Vivet, Pascal
%A Guthmuller, Eric
%A Thonnart, Yvain
%A Pillonnet, Gaël
%A Tortolero, César Fuguet
%A Miro-Panades, Ivan
%A Moritz, Guillaume
%A Durupt, Jean
%A Bernard, Christian
%A Varreau, Didier
%A Pontes, Julian J. H.
%A Thuries, Sébastien
%A Coriat, David
%A Harrand, Michel
%A Dutoit, Denis
%A Lattard, Didier
%A Arnaud, Lucile
%A Charbonnier, Jean
%A Coudrain, Perceval
%A Garnier, Arnaud
%A Berger, Frédéric
%A Gueugnot, Alain
%A Greiner, Alain
%A Meunier, Quentin L.
%A Farcy, Alexis
%A Arriordaz, Alexandre
%A Cheramy, Séverine
%A Clermidy, Fabien
%D 2021
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 79-97
%T IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc56.html#VivetGTPTMMDBVP21
%V 56
@article{journals/jssc/VivetGTPTMMDBVP21,
added-at = {2024-02-05T00:00:00.000+0100},
author = {Vivet, Pascal and Guthmuller, Eric and Thonnart, Yvain and Pillonnet, Gaël and Tortolero, César Fuguet and Miro-Panades, Ivan and Moritz, Guillaume and Durupt, Jean and Bernard, Christian and Varreau, Didier and Pontes, Julian J. H. and Thuries, Sébastien and Coriat, David and Harrand, Michel and Dutoit, Denis and Lattard, Didier and Arnaud, Lucile and Charbonnier, Jean and Coudrain, Perceval and Garnier, Arnaud and Berger, Frédéric and Gueugnot, Alain and Greiner, Alain and Meunier, Quentin L. and Farcy, Alexis and Arriordaz, Alexandre and Cheramy, Séverine and Clermidy, Fabien},
biburl = {https://www.bibsonomy.org/bibtex/261f1d72af3b9634587313e097f92eeba/dblp},
ee = {https://doi.org/10.1109/JSSC.2020.3036341},
interhash = {e5b789721a07866e3e8f617b74788f66},
intrahash = {61f1d72af3b9634587313e097f92eeba},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {79-97},
timestamp = {2024-04-08T10:42:49.000+0200},
title = {IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc56.html#VivetGTPTMMDBVP21},
volume = 56,
year = 2021
}