%0 Conference Paper %1 conf/samos/GiraldoWMLA14 %A Giraldo, Juan Fernando Eusse %A Williams, Christopher %A Murillo, Luis Gabriel %A Leupers, Rainer %A Ascheid, Gerd %B ICSAMOS %D 2014 %I IEEE %K dblp %P 133-140 %T Pre-architectural performance estimation for ASIP design based on abstract processor models. %U http://dblp.uni-trier.de/db/conf/samos/samos2014ic.html#GiraldoWMLA14

@inproceedings{conf/samos/GiraldoWMLA14, added-at = {2019-04-16T00:00:00.000+0200}, author = {Giraldo, Juan Fernando Eusse and Williams, Christopher and Murillo, Luis Gabriel and Leupers, Rainer and Ascheid, Gerd}, biburl = {https://www.bibsonomy.org/bibtex/236ea6e1cf809247a2359100bf7b44155/dblp}, booktitle = {ICSAMOS}, crossref = {conf/samos/2014ic}, ee = {https://doi.org/10.1109/SAMOS.2014.6893204}, interhash = {e7cff462fc26e6e65cf2d5860fd3047f}, intrahash = {36ea6e1cf809247a2359100bf7b44155}, keywords = {dblp}, pages = {133-140}, publisher = {IEEE}, timestamp = {2019-10-17T12:50:46.000+0200}, title = {Pre-architectural performance estimation for ASIP design based on abstract processor models.}, url = {http://dblp.uni-trier.de/db/conf/samos/samos2014ic.html#GiraldoWMLA14}, year = 2014 }