%0 Journal Article %1 journals/jssc/ChenZLMT18 %A Chen, Yu %A Zhang, Xiaoyang %A Lian, Yong %A Manohar, Rajit %A Tsividis, Yannis P. %D 2018 %J IEEE J. Solid State Circuits %K dblp %N 2 %P 418-430 %T A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption. %U http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#ChenZLMT18 %V 53

@article{journals/jssc/ChenZLMT18, added-at = {2022-04-21T00:00:00.000+0200}, author = {Chen, Yu and Zhang, Xiaoyang and Lian, Yong and Manohar, Rajit and Tsividis, Yannis P.}, biburl = {https://www.bibsonomy.org/bibtex/2c8a4c799b7dad8b8afec5c087909e4fb/dblp}, ee = {https://doi.org/10.1109/JSSC.2017.2769339}, interhash = {e9346a25ffb6545f3bf221f1e59d6b4b}, intrahash = {c8a4c799b7dad8b8afec5c087909e4fb}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 2, pages = {418-430}, timestamp = {2024-04-08T10:42:55.000+0200}, title = {A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#ChenZLMT18}, volume = 53, year = 2018 }