%0 Conference Paper %1 conf/dsn/LotfiSBRS18 %A Lotfi, Atieh %A Saxena, Nirmal R. %A Bramley, Richard %A Racunas, Paul %A Shirvani, Philip P. %B DSN %D 2018 %I IEEE Computer Society %K dblp %P 314-321 %T Low Overhead Tag Error Mitigation for GPU Architectures. %U http://dblp.uni-trier.de/db/conf/dsn/dsn2018.html#LotfiSBRS18 %@ 978-1-5386-5596-2

@inproceedings{conf/dsn/LotfiSBRS18, added-at = {2023-03-24T00:00:00.000+0100}, author = {Lotfi, Atieh and Saxena, Nirmal R. and Bramley, Richard and Racunas, Paul and Shirvani, Philip P.}, biburl = {https://www.bibsonomy.org/bibtex/21a8289828b2ffa8fc9a94197a6f7cd82/dblp}, booktitle = {DSN}, crossref = {conf/dsn/2018}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSN.2018.00041}, interhash = {ebdba2f94513243b72d9ad295cad192b}, intrahash = {1a8289828b2ffa8fc9a94197a6f7cd82}, isbn = {978-1-5386-5596-2}, keywords = {dblp}, pages = {314-321}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T16:07:43.000+0200}, title = {Low Overhead Tag Error Mitigation for GPU Architectures.}, url = {http://dblp.uni-trier.de/db/conf/dsn/dsn2018.html#LotfiSBRS18}, year = 2018 }