%0 Conference Paper %1 conf/iscas/DorzhigulovMS22 %A Dorzhigulov, Anuar %A Mishra, Shubham %A Saxena, Vishal %B ISCAS %D 2022 %I IEEE %K dblp %P 1828-1832 %T Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#DorzhigulovMS22 %@ 978-1-6654-8485-5

@inproceedings{conf/iscas/DorzhigulovMS22, added-at = {2024-10-06T00:00:00.000+0200}, author = {Dorzhigulov, Anuar and Mishra, Shubham and Saxena, Vishal}, biburl = {https://www.bibsonomy.org/bibtex/253467a556d19ca8bc1851f27f32b8c62/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2022}, ee = {https://doi.org/10.1109/ISCAS48785.2022.9937514}, interhash = {ec62438b3f1c7e6c85e0adf3e9478e54}, intrahash = {53467a556d19ca8bc1851f27f32b8c62}, isbn = {978-1-6654-8485-5}, keywords = {dblp}, pages = {1828-1832}, publisher = {IEEE}, timestamp = {2024-10-07T09:59:30.000+0200}, title = {Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2022.html#DorzhigulovMS22}, year = 2022 }