%0 Conference Paper %1 conf/csps/HuYY17 %A Hu, Min %A Yan, Shibo %A Yang, Qiang %B CSPS %D 2017 %E Liang, Qilian %E Mu, Jiasong %E Jia, Min %E Wang, Wei %E Feng, Xuhong %E Zhang, Baoju %I Springer %K dblp %P 1207-1214 %T Parallel Processing Implement Construction of Target Echo Simulation Based on Real Track. %U http://dblp.uni-trier.de/db/conf/csps/csps2017.html#HuYY17 %V 463 %@ 978-981-10-6571-2

@inproceedings{conf/csps/HuYY17, added-at = {2020-04-11T00:00:00.000+0200}, author = {Hu, Min and Yan, Shibo and Yang, Qiang}, biburl = {https://www.bibsonomy.org/bibtex/28375267294cc1460c14fe96caac6f3e2/dblp}, booktitle = {CSPS}, crossref = {conf/csps/2017}, editor = {Liang, Qilian and Mu, Jiasong and Jia, Min and Wang, Wei and Feng, Xuhong and Zhang, Baoju}, ee = {https://doi.org/10.1007/978-981-10-6571-2_144}, interhash = {ec80e25616c09834d6e4f849c5e66f55}, intrahash = {8375267294cc1460c14fe96caac6f3e2}, isbn = {978-981-10-6571-2}, keywords = {dblp}, pages = {1207-1214}, publisher = {Springer}, series = {Lecture Notes in Electrical Engineering}, timestamp = {2020-04-14T12:04:04.000+0200}, title = {Parallel Processing Implement Construction of Target Echo Simulation Based on Real Track.}, url = {http://dblp.uni-trier.de/db/conf/csps/csps2017.html#HuYY17}, volume = 463, year = 2017 }