%0 Conference Paper %1 conf/iscas/LiuLFTGZ18 %A Liu, Zhe %A Lou, Liheng %A Fang, Zhongyuan %A Tang, Kai %A Guo, Ting %A Zheng, Yuanjin %B ISCAS %D 2018 %I IEEE %K dblp %P 1-4 %T A DLL-based Configurable Multi-Phase Clock Generator for True-Time-Delay Wideband FMCW Phased-Array in 40nm CMOS. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2018.html#LiuLFTGZ18 %@ 978-1-5386-4881-0

@inproceedings{conf/iscas/LiuLFTGZ18, added-at = {2022-10-10T00:00:00.000+0200}, author = {Liu, Zhe and Lou, Liheng and Fang, Zhongyuan and Tang, Kai and Guo, Ting and Zheng, Yuanjin}, biburl = {https://www.bibsonomy.org/bibtex/2ca705123bb4348c6713093fa54351681/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2018}, ee = {https://doi.org/10.1109/ISCAS.2018.8351374}, interhash = {ee00b4a83a30dc25dcab3fdf06b1329d}, intrahash = {ca705123bb4348c6713093fa54351681}, isbn = {978-1-5386-4881-0}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-10T17:49:02.000+0200}, title = {A DLL-based Configurable Multi-Phase Clock Generator for True-Time-Delay Wideband FMCW Phased-Array in 40nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2018.html#LiuLFTGZ18}, year = 2018 }