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%0 Journal Article
%1 journals/jssc/SongPLCAPK22
%A Song, Jaegeun
%A Park, Yunsoo
%A Lim, Chaegang
%A Choi, Yohan
%A Ahn, Soonsung
%A Park, Sooho
%A Kim, Chulwoo
%D 2022
%J IEEE J. Solid State Circuits
%K dblp
%N 5
%P 1492-1503
%T A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#SongPLCAPK22
%V 57
@article{journals/jssc/SongPLCAPK22,
added-at = {2022-05-18T00:00:00.000+0200},
author = {Song, Jaegeun and Park, Yunsoo and Lim, Chaegang and Choi, Yohan and Ahn, Soonsung and Park, Sooho and Kim, Chulwoo},
biburl = {https://www.bibsonomy.org/bibtex/25c370e937db0d441ed05230753e3bfe0/dblp},
ee = {https://doi.org/10.1109/JSSC.2021.3111924},
interhash = {f046219741913da1f3c744531a5f4b47},
intrahash = {5c370e937db0d441ed05230753e3bfe0},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 5,
pages = {1492-1503},
timestamp = {2024-04-08T10:43:23.000+0200},
title = {A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#SongPLCAPK22},
volume = 57,
year = 2022
}