Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Conference Paper
%1 conf/glvlsi/HeDBGC10
%A He, Ou
%A Dong, Sheqin
%A Bian, Jinian
%A Goto, Satoshi
%A Cheng, Chung-Kuan
%B ACM Great Lakes Symposium on VLSI
%D 2010
%E Bahar, R. Iris
%E Lombardi, Fabrizio
%E Atienza, David
%E Brunvand, Erik
%I ACM
%K dblp
%P 9-14
%T Bus via reduction based on floorplan revising.
%U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2010.html#HeDBGC10
%@ 978-1-4503-0012-4
@inproceedings{conf/glvlsi/HeDBGC10,
added-at = {2018-11-06T00:00:00.000+0100},
author = {He, Ou and Dong, Sheqin and Bian, Jinian and Goto, Satoshi and Cheng, Chung-Kuan},
biburl = {https://www.bibsonomy.org/bibtex/239e90b42c5714387741e5f50b5c64836/dblp},
booktitle = {ACM Great Lakes Symposium on VLSI},
crossref = {conf/glvlsi/2010},
editor = {Bahar, R. Iris and Lombardi, Fabrizio and Atienza, David and Brunvand, Erik},
ee = {https://doi.org/10.1145/1785481.1785486},
interhash = {f61f831403b1eee7d85f474cf2effbab},
intrahash = {39e90b42c5714387741e5f50b5c64836},
isbn = {978-1-4503-0012-4},
keywords = {dblp},
pages = {9-14},
publisher = {ACM},
timestamp = {2018-11-07T14:24:46.000+0100},
title = {Bus via reduction based on floorplan revising.},
url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2010.html#HeDBGC10},
year = 2010
}