%0 Journal Article %1 journals/tvlsi/WangLK16 %A Wang, Bo %A Li, Qi %A Kim, Tony Tae-Hyoung %D 2016 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 6 %P 2165-2173 %T Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangLK16 %V 24

@article{journals/tvlsi/WangLK16, added-at = {2022-04-09T00:00:00.000+0200}, author = {Wang, Bo and Li, Qi and Kim, Tony Tae-Hyoung}, biburl = {https://www.bibsonomy.org/bibtex/25c86243489265ce4337fcb649a15dfa5/dblp}, ee = {https://doi.org/10.1109/TVLSI.2015.2499441}, interhash = {20ad8baab1afa37518e9658570e916fc}, intrahash = {5c86243489265ce4337fcb649a15dfa5}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 6, pages = {2165-2173}, timestamp = {2024-04-08T14:33:10.000+0200}, title = {Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangLK16}, volume = 24, year = 2016 }