%0 Conference Paper %1 DBLP:conf/isca/BachaT13 %A Bacha, Anys %A Teodorescu, Radu %B The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013 %D 2013 %K reliability significance %P 297--307 %R 10.1145/2485922.2485948 %T Dynamic reduction of voltage margins by leveraging on-chip ECC in Itanium II processors %U http://doi.acm.org/10.1145/2485922.2485948

@inproceedings{DBLP:conf/isca/BachaT13, added-at = {2017-10-22T21:30:40.000+0200}, author = {Bacha, Anys and Teodorescu, Radu}, bibsource = {dblp computer science bibliography, http://dblp.org}, biburl = {https://www.bibsonomy.org/bibtex/21da84a27a96c5343c5360594b1ea4e5b/csl_uth}, booktitle = {The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013}, crossref = {DBLP:conf/isca/2013}, doi = {10.1145/2485922.2485948}, interhash = {f5f74e5c40ba51078688de4ef1e420a1}, intrahash = {1da84a27a96c5343c5360594b1ea4e5b}, keywords = {reliability significance}, pages = {297--307}, timestamp = {2018-02-19T18:23:47.000+0100}, title = {Dynamic reduction of voltage margins by leveraging on-chip {ECC} in Itanium {II} processors}, url = {http://doi.acm.org/10.1145/2485922.2485948}, year = 2013 }