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%0 Journal Article
%1 journals/jssc/NahasAGSLAPM08
%A Nahas, Joseph J.
%A Andre, Thomas W.
%A Garni, Brad
%A Subramanian, Chitra K.
%A Lin, Hal
%A Alam, Syed M.
%A Papworth, Ken
%A Martino, William L.
%D 2008
%J IEEE J. Solid State Circuits
%K dblp
%N 8
%P 1826-1834
%T A 180 Kbit Embeddable MRAM Memory Module.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#NahasAGSLAPM08
%V 43
@article{journals/jssc/NahasAGSLAPM08,
added-at = {2022-02-28T00:00:00.000+0100},
author = {Nahas, Joseph J. and Andre, Thomas W. and Garni, Brad and Subramanian, Chitra K. and Lin, Hal and Alam, Syed M. and Papworth, Ken and Martino, William L.},
biburl = {https://www.bibsonomy.org/bibtex/2815a5839a80fa8c605f7ea85d9bb641b/dblp},
ee = {https://doi.org/10.1109/JSSC.2008.925408},
interhash = {23368704b46b0eeb690399af95d4bd58},
intrahash = {815a5839a80fa8c605f7ea85d9bb641b},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 8,
pages = {1826-1834},
timestamp = {2024-04-08T10:43:07.000+0200},
title = {A 180 Kbit Embeddable MRAM Memory Module.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#NahasAGSLAPM08},
volume = 43,
year = 2008
}