%0 Journal Article %1 journals/tcas/QiHG17 %A Qi, Honggang %A Huang, Qingming %A Gao, Wen %D 2017 %J IEEE Trans. Circuits Syst. II Express Briefs %K dblp %N 3 %P 349-353 %T A Bit-Plane Decomposition Matrix-Based VLSI Integer Transform Architecture for HEVC. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#QiHG17 %V 64-II

@article{journals/tcas/QiHG17, added-at = {2020-05-27T00:00:00.000+0200}, author = {Qi, Honggang and Huang, Qingming and Gao, Wen}, biburl = {https://www.bibsonomy.org/bibtex/24d5b3137610f4226e3ff33f076e727f1/dblp}, ee = {https://doi.org/10.1109/TCSII.2016.2576061}, interhash = {a4fa5bd7b527f4eba08e1e9f32e1e551}, intrahash = {4d5b3137610f4226e3ff33f076e727f1}, journal = {IEEE Trans. Circuits Syst. II Express Briefs}, keywords = {dblp}, number = 3, pages = {349-353}, timestamp = {2020-05-28T11:51:44.000+0200}, title = {A Bit-Plane Decomposition Matrix-Based VLSI Integer Transform Architecture for HEVC.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#QiHG17}, volume = {64-II}, year = 2017 }