%0 Conference Paper %1 conf/icassp/MinD91 %A Min, B. K. %A Demassieux, Nicolas %B ICASSP %D 1991 %I IEEE Computer Society %K dblp %P 1101-1104 %T A versatile architecture for VLSI implementation of the Viterbi algorithm. %U http://dblp.uni-trier.de/db/conf/icassp/icassp1991.html#MinD91 %@ 0-7803-0003-3

@inproceedings{conf/icassp/MinD91, added-at = {2020-07-09T00:00:00.000+0200}, author = {Min, B. K. and Demassieux, Nicolas}, biburl = {https://www.bibsonomy.org/bibtex/2de38132f01581239f9bf37b19ca8e484/dblp}, booktitle = {ICASSP}, crossref = {conf/icassp/1991}, ee = {https://doi.org/10.1109/ICASSP.1991.150556}, interhash = {2573a50fa0f15ea358845a13e999bf17}, intrahash = {de38132f01581239f9bf37b19ca8e484}, isbn = {0-7803-0003-3}, keywords = {dblp}, pages = {1101-1104}, publisher = {IEEE Computer Society}, timestamp = {2024-04-09T13:56:08.000+0200}, title = {A versatile architecture for VLSI implementation of the Viterbi algorithm.}, url = {http://dblp.uni-trier.de/db/conf/icassp/icassp1991.html#MinD91}, year = 1991 }