This paper describes the design of a fully integrated PC-architecture SoC for industrial control which is capable of executing DOS and X86-compatible binary applications. It is a high performance and cost-effective SoC and meets the needs of embedded applications. The SoC provides 2 UARTs, 1 ECP/EPP parallel port, PC104 bus interface, 15 interrupt requests, 3 DMA requests, 3 timers, and 1 watchdog timer. Further, it supports up to 64 MB SDRAM, 32 MB solid state disk. The SOC integrates a self-designed 486DX4 compatible microprocessor, system control logic, SDRAM controller and peripheral control logic. It was designed using 0.18 mum CMOS standard cell library and consists of about 780 K gates, 10 KB SRAM and 350 Kbits ROM. It works at 133 MHz frequency, with less than 2 W power consumption.
%0 Conference Paper
%1 citeulike:4544420
%A Jing, Wang
%A Xiaoya, Fan
%A Shenbing, Zhang
%A Meng, Zhang
%A Hai, Wang
%B Integrated Circuits, 2007. ISIC '07. International Symposium on
%D 2007
%J Integrated Circuits, 2007. ISIC '07. International Symposium on
%K fpga, p86\_paper, x86
%P 516--519
%R 10.1109/ISICIR.2007.4441912
%T A Fully Integrated PC-architecture SoC for Industrial Control
%U http://dx.doi.org/10.1109/ISICIR.2007.4441912
%X This paper describes the design of a fully integrated PC-architecture SoC for industrial control which is capable of executing DOS and X86-compatible binary applications. It is a high performance and cost-effective SoC and meets the needs of embedded applications. The SoC provides 2 UARTs, 1 ECP/EPP parallel port, PC104 bus interface, 15 interrupt requests, 3 DMA requests, 3 timers, and 1 watchdog timer. Further, it supports up to 64 MB SDRAM, 32 MB solid state disk. The SOC integrates a self-designed 486DX4 compatible microprocessor, system control logic, SDRAM controller and peripheral control logic. It was designed using 0.18 mum CMOS standard cell library and consists of about 780 K gates, 10 KB SRAM and 350 Kbits ROM. It works at 133 MHz frequency, with less than 2 W power consumption.
@inproceedings{citeulike:4544420,
abstract = {This paper describes the design of a fully integrated PC-architecture SoC for industrial control which is capable of executing DOS and X86-compatible binary applications. It is a high performance and cost-effective SoC and meets the needs of embedded applications. The SoC provides 2 UARTs, 1 ECP/EPP parallel port, PC104 bus interface, 15 interrupt requests, 3 DMA requests, 3 timers, and 1 watchdog timer. Further, it supports up to 64 MB SDRAM, 32 MB solid state disk. The SOC integrates a self-designed 486DX4 compatible microprocessor, system control logic, SDRAM controller and peripheral control logic. It was designed using 0.18 mum CMOS standard cell library and consists of about 780 K gates, 10 KB SRAM and 350 Kbits ROM. It works at 133 MHz frequency, with less than 2 W power consumption.},
added-at = {2009-05-19T18:00:18.000+0200},
author = {Jing, Wang and Xiaoya, Fan and Shenbing, Zhang and Meng, Zhang and Hai, Wang},
biburl = {https://www.bibsonomy.org/bibtex/26592ae45e9107a6c120714958f250613/earthfare},
booktitle = {Integrated Circuits, 2007. ISIC '07. International Symposium on},
citeulike-article-id = {4544420},
description = {CiteULike: Everyone's library},
doi = {10.1109/ISICIR.2007.4441912},
interhash = {91d6bf455fd432036417eb710d7f1a2c},
intrahash = {6592ae45e9107a6c120714958f250613},
journal = {Integrated Circuits, 2007. ISIC '07. International Symposium on},
keywords = {fpga, p86\_paper, x86},
pages = {516--519},
posted-at = {2009-05-19 07:52:26},
priority = {0},
timestamp = {2009-05-19T18:03:27.000+0200},
title = {A Fully Integrated PC-architecture SoC for Industrial Control},
url = {http://dx.doi.org/10.1109/ISICIR.2007.4441912},
year = 2007
}