%0 Conference Paper %1 conf/isscc/TakemotoYYHTSMY21 %A Takemoto, Takashi %A Yamamoto, Kasho %A Yoshimura, Chihiro %A Hayashi, Masato %A Tada, Masafumi %A Saito, Hiroaki %A Mashimo, Mayumi %A Yamaoka, Masanao %B ISSCC %D 2021 %I IEEE %K dblp %P 64-66 %T 4.6 A 144Kb Annealing System Composed of 9× 16Kb Annealing Processor Chips with Scalable Chip-to-Chip Connections for Large-Scale Combinatorial Optimization Problems. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2021.html#TakemotoYYHTSMY21 %@ 978-1-7281-9549-0

@inproceedings{conf/isscc/TakemotoYYHTSMY21, added-at = {2021-03-10T00:00:00.000+0100}, author = {Takemoto, Takashi and Yamamoto, Kasho and Yoshimura, Chihiro and Hayashi, Masato and Tada, Masafumi and Saito, Hiroaki and Mashimo, Mayumi and Yamaoka, Masanao}, biburl = {https://www.bibsonomy.org/bibtex/276b64fd8dcafa547990fea25aaf3edce/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2021}, ee = {https://doi.org/10.1109/ISSCC42613.2021.9365748}, interhash = {cd0a47c4f17602c9221f035b73e946b9}, intrahash = {76b64fd8dcafa547990fea25aaf3edce}, isbn = {978-1-7281-9549-0}, keywords = {dblp}, pages = {64-66}, publisher = {IEEE}, timestamp = {2024-04-09T20:43:12.000+0200}, title = {4.6 A 144Kb Annealing System Composed of 9× 16Kb Annealing Processor Chips with Scalable Chip-to-Chip Connections for Large-Scale Combinatorial Optimization Problems.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2021.html#TakemotoYYHTSMY21}, year = 2021 }