%0 Conference Paper %1 conf/ACISicis/WaidyasooriyaH16 %A Waidyasooriya, Hasitha Muthumala %A Hariyama, Masanori %B ICIS %D 2016 %I IEEE Computer Society %K dblp %P 1-6 %T FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL. %U http://dblp.uni-trier.de/db/conf/ACISicis/ACISicis2016.html#WaidyasooriyaH16 %@ 978-1-5090-0806-3

@inproceedings{conf/ACISicis/WaidyasooriyaH16, added-at = {2023-03-24T00:00:00.000+0100}, author = {Waidyasooriya, Hasitha Muthumala and Hariyama, Masanori}, biburl = {https://www.bibsonomy.org/bibtex/29aae606a1ad190f14839eb08b571278a/dblp}, booktitle = {ICIS}, crossref = {conf/ACISicis/2016}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICIS.2016.7550742}, interhash = {a41e10716be41b71c331ac9aa726122e}, intrahash = {9aae606a1ad190f14839eb08b571278a}, isbn = {978-1-5090-0806-3}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:39:46.000+0200}, title = {FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL.}, url = {http://dblp.uni-trier.de/db/conf/ACISicis/ACISicis2016.html#WaidyasooriyaH16}, year = 2016 }