%0 Journal Article %1 owens2007research %A Owens, J.D. %A Dally, W.J. %A Ho, R. %A Jayasimha, DN %A Keckler, S.W. %A Peh, L.S. %D 2007 %I IEEE %J Micro, IEEE %K on-chip %N 5 %P 96--108 %R 10.1109/MM.2007.4378787 %T Research challenges for on-chip interconnection networks %V 27 %X On-chip interconnection networks are rapidly becoming a key enabling technology for commodity multicore processors and SoCs common in consumer embedded systems, the National Science Foundation initiated a workshop that addressed upcoming research issues in OCIN technology, design, and implementation and set a direction for researchers in the field.

@article{owens2007research, abstract = {On-chip interconnection networks are rapidly becoming a key enabling technology for commodity multicore processors and SoCs common in consumer embedded systems, the National Science Foundation initiated a workshop that addressed upcoming research issues in OCIN technology, design, and implementation and set a direction for researchers in the field.}, added-at = {2012-11-20T20:14:49.000+0100}, author = {Owens, J.D. and Dally, W.J. and Ho, R. and Jayasimha, DN and Keckler, S.W. and Peh, L.S.}, biburl = {https://www.bibsonomy.org/bibtex/2a387903e8b77ca20e3c1440fce956ce0/ytyoun}, doi = {10.1109/MM.2007.4378787}, interhash = {00c66b6e857651fa517ec7a1ebfeb981}, intrahash = {a387903e8b77ca20e3c1440fce956ce0}, journal = {Micro, IEEE}, keywords = {on-chip}, number = 5, pages = {96--108}, publisher = {IEEE}, timestamp = {2012-11-20T20:14:49.000+0100}, title = {Research challenges for on-chip interconnection networks}, volume = 27, year = 2007 }