%0 Conference Paper %1 conf/iolts/YoshimotoAKTYMYKY11 %A Yoshimoto, Shusuke %A Amashita, Takuro %A Kozuwa, D. %A Takata, Taiga %A Yoshimura, Masayoshi %A Matsunaga, Yusuke %A Yasuura, Hiroto %A Kawaguchi, Hiroshi %A Yoshimoto, Masahiko %B IOLTS %D 2011 %I IEEE Computer Society %K dblp %P 151-156 %T Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure. %U http://dblp.uni-trier.de/db/conf/iolts/iolts2011.html#YoshimotoAKTYMYKY11 %@ 978-1-4577-1053-7

@inproceedings{conf/iolts/YoshimotoAKTYMYKY11, added-at = {2024-03-11T00:00:00.000+0100}, author = {Yoshimoto, Shusuke and Amashita, Takuro and Kozuwa, D. and Takata, Taiga and Yoshimura, Masayoshi and Matsunaga, Yusuke and Yasuura, Hiroto and Kawaguchi, Hiroshi and Yoshimoto, Masahiko}, biburl = {https://www.bibsonomy.org/bibtex/2a4093a2c656c2a4a6d4ed7e61aa5992a/dblp}, booktitle = {IOLTS}, crossref = {conf/iolts/2011}, ee = {https://doi.ieeecomputersociety.org/10.1109/IOLTS.2011.5993829}, interhash = {612c1d7a5efb289479da69db4c061c80}, intrahash = {a4093a2c656c2a4a6d4ed7e61aa5992a}, isbn = {978-1-4577-1053-7}, keywords = {dblp}, pages = {151-156}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T10:52:08.000+0200}, title = {Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure.}, url = {http://dblp.uni-trier.de/db/conf/iolts/iolts2011.html#YoshimotoAKTYMYKY11}, year = 2011 }