We present a methodology for Multi-FPGA systems (MFS)
design. MFSs are used for a great variety of
applications, including dynamically re-configurable
hardware applications, digital circuit emulation, and
numerical computation. There are a great variety of
boards for MFS implementation. We have employed a set
of techniques based on evolutionary algorithms, and we
show that they are capable of solving all of the design
tasks (partitioning placement and routing). Firstly a
hybrid compact genetic algorithm solves the
partitioning problem and then genetic programming is
used to obtain a solution for the two other tasks.
%0 Journal Article
%1 Fernandez:2004:MM
%A Fernandez de Vega, Francisco
%A Hidalgo, J. I.
%A Lanchares, J.
%A Sanchez, J. M.
%D 2004
%J Microprocessors and Microsystems
%K Compact Configurable Field algorithm, algorithms, arrays, blocks gate genetic hardware, logic programmable programming, reconfigurable
%N 7
%P 363--371
%R doi:10.1016/j.micpro.2004.03.017
%T A methodology for reconfigurable hardware design based
upon evolutionary computation
%U http://www.sciencedirect.com/science/article/B6V0X-4C4BWW7-1/2/815fe7c17a6207d7a31f8046e4e2a5d1
%V 28
%X We present a methodology for Multi-FPGA systems (MFS)
design. MFSs are used for a great variety of
applications, including dynamically re-configurable
hardware applications, digital circuit emulation, and
numerical computation. There are a great variety of
boards for MFS implementation. We have employed a set
of techniques based on evolutionary algorithms, and we
show that they are capable of solving all of the design
tasks (partitioning placement and routing). Firstly a
hybrid compact genetic algorithm solves the
partitioning problem and then genetic programming is
used to obtain a solution for the two other tasks.
@article{Fernandez:2004:MM,
abstract = {We present a methodology for Multi-FPGA systems (MFS)
design. MFSs are used for a great variety of
applications, including dynamically re-configurable
hardware applications, digital circuit emulation, and
numerical computation. There are a great variety of
boards for MFS implementation. We have employed a set
of techniques based on evolutionary algorithms, and we
show that they are capable of solving all of the design
tasks (partitioning placement and routing). Firstly a
hybrid compact genetic algorithm solves the
partitioning problem and then genetic programming is
used to obtain a solution for the two other tasks.},
added-at = {2008-06-19T17:35:00.000+0200},
author = {{Fernandez de Vega}, Francisco and Hidalgo, J. I. and Lanchares, J. and Sanchez, J. M.},
biburl = {https://www.bibsonomy.org/bibtex/2c0788231d583c294cef67cbc15c68c8e/brazovayeye},
doi = {doi:10.1016/j.micpro.2004.03.017},
email = {fcofdez@unex.es},
interhash = {513adf089bfc3faf3a98d7c2c92d4e04},
intrahash = {c0788231d583c294cef67cbc15c68c8e},
issn = {0141-9331},
journal = {Microprocessors and Microsystems},
keywords = {Compact Configurable Field algorithm, algorithms, arrays, blocks gate genetic hardware, logic programmable programming, reconfigurable},
month = {September},
number = 7,
pages = {363--371},
size = {9 pages},
timestamp = {2008-06-19T17:39:32.000+0200},
title = {A methodology for reconfigurable hardware design based
upon evolutionary computation},
url = {http://www.sciencedirect.com/science/article/B6V0X-4C4BWW7-1/2/815fe7c17a6207d7a31f8046e4e2a5d1},
volume = 28,
year = 2004
}