Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. Since the extension of an instruction set and its utilization are non-trivial tasks, sophisticated tools have to provide guidance and support during design. Feedback driven optimization allows for the highest level of specialization, but calls for a simulator that is aware of the newly proposed instructions, a compiler that makes use of these instructions without manual intervention, and an application program that is representative for the targeted application domain.In this paper we introduce an approach for the extension of instruction sets that is built around a concise yet powerful processor abstraction. The specification of a processor is well suited to automatically generate the important parts of a compiler backend and cycle-accurate simulator. A typical design cycle involves the execution of the representative application program, evaluation of performance statistics collected by the simulator, refinement of the processor specification guided by performance statistics, and update of the compiler and simulator according to the refined specification. We demonstrate the usefulness of our novel approach by example of an instruction set for symmetric ciphers.
%0 Journal Article
%1 997182
%A Kastens, Uwe
%A Le, Dinh Khoi
%A Slowik, Adrian
%A Thies, Michael
%C New York, NY, USA
%D 2004
%I ACM
%J SIGPLAN Not.
%K ISA PhD Proposal hardware
%N 7
%P 126--135
%R http://doi.acm.org/10.1145/998300.997182
%T Feedback driven instruction-set extension
%U http://portal.acm.org/citation.cfm?id=998300.997182&coll=portal&dl=ACM
%V 39
%X Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. Since the extension of an instruction set and its utilization are non-trivial tasks, sophisticated tools have to provide guidance and support during design. Feedback driven optimization allows for the highest level of specialization, but calls for a simulator that is aware of the newly proposed instructions, a compiler that makes use of these instructions without manual intervention, and an application program that is representative for the targeted application domain.In this paper we introduce an approach for the extension of instruction sets that is built around a concise yet powerful processor abstraction. The specification of a processor is well suited to automatically generate the important parts of a compiler backend and cycle-accurate simulator. A typical design cycle involves the execution of the representative application program, evaluation of performance statistics collected by the simulator, refinement of the processor specification guided by performance statistics, and update of the compiler and simulator according to the refined specification. We demonstrate the usefulness of our novel approach by example of an instruction set for symmetric ciphers.
@article{997182,
abstract = {Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. Since the extension of an instruction set and its utilization are non-trivial tasks, sophisticated tools have to provide guidance and support during design. Feedback driven optimization allows for the highest level of specialization, but calls for a simulator that is aware of the newly proposed instructions, a compiler that makes use of these instructions without manual intervention, and an application program that is representative for the targeted application domain.In this paper we introduce an approach for the extension of instruction sets that is built around a concise yet powerful processor abstraction. The specification of a processor is well suited to automatically generate the important parts of a compiler backend and cycle-accurate simulator. A typical design cycle involves the execution of the representative application program, evaluation of performance statistics collected by the simulator, refinement of the processor specification guided by performance statistics, and update of the compiler and simulator according to the refined specification. We demonstrate the usefulness of our novel approach by example of an instruction set for symmetric ciphers.},
added-at = {2008-09-04T10:32:03.000+0200},
address = {New York, NY, USA},
author = {Kastens, Uwe and Le, Dinh Khoi and Slowik, Adrian and Thies, Michael},
biburl = {https://www.bibsonomy.org/bibtex/2d4fedbef30fe8bfb1e67221f94a1352f/gron},
description = {Feedback driven instruction-set extension},
doi = {http://doi.acm.org/10.1145/998300.997182},
interhash = {2de664d4dc2268704451ceb4958a5062},
intrahash = {d4fedbef30fe8bfb1e67221f94a1352f},
issn = {0362-1340},
journal = {SIGPLAN Not.},
keywords = {ISA PhD Proposal hardware},
number = 7,
pages = {126--135},
publisher = {ACM},
timestamp = {2008-09-04T10:32:03.000+0200},
title = {Feedback driven instruction-set extension},
url = {http://portal.acm.org/citation.cfm?id=998300.997182&coll=portal&dl=ACM},
volume = 39,
year = 2004
}