%0 Journal Article %1 journals/tvlsi/LiCRV05 %A Li, Hai %A Cher, Chen-Yong %A Roy, Kaushik %A Vijaykumar, T. N. %D 2005 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 5 %P 564-576 %T Combined circuit and architectural level variable supply-voltage scaling for low power. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi13.html#LiCRV05 %V 13

@article{journals/tvlsi/LiCRV05, added-at = {2020-03-11T00:00:00.000+0100}, author = {Li, Hai and Cher, Chen-Yong and Roy, Kaushik and Vijaykumar, T. N.}, biburl = {https://www.bibsonomy.org/bibtex/2da6337fd6f5d76db078d79432f9fa0e2/dblp}, ee = {https://doi.org/10.1109/TVLSI.2005.844295}, interhash = {74fb22a1091a9124ff97f85f64f4d08f}, intrahash = {da6337fd6f5d76db078d79432f9fa0e2}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 5, pages = {564-576}, timestamp = {2020-03-12T11:41:10.000+0100}, title = {Combined circuit and architectural level variable supply-voltage scaling for low power.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi13.html#LiCRV05}, volume = 13, year = 2005 }