%0 Generic %1 tang02power %A Tang, W. %A Gupta, R. %A Nicolau, A. %D 2002 %K Cache DATE Hardware Management %T Power Savings in Embedded Processors Through Decode Filter Cache %U citeseer.ist.psu.edu/article/tang02power.html %X In embedded processors, instruction fetch and decode can consume more than 40% of processor power. An instruction filter cache can be placed between the CPU core and the instruction cache to service the instruction stream. Power savings in instruction fetch result from accesses to a small cache. In this paper, we introduce decode filter cache to provide decoded instruction stream. On a hit in the decode filter cache, fetching from the instruction cache and the subsequent decoding is...

@misc{tang02power, abstract = {In embedded processors, instruction fetch and decode can consume more than 40% of processor power. An instruction filter cache can be placed between the CPU core and the instruction cache to service the instruction stream. Power savings in instruction fetch result from accesses to a small cache. In this paper, we introduce decode filter cache to provide decoded instruction stream. On a hit in the decode filter cache, fetching from the instruction cache and the subsequent decoding is...}, added-at = {2007-04-12T12:30:12.000+0200}, author = {Tang, W. and Gupta, R. and Nicolau, A.}, biburl = {https://www.bibsonomy.org/bibtex/2dca40f8e780f1ba5fb0c9961a9403b09/derkling}, interhash = {8a33dbfb2cfef83360cbaed7d3eb669a}, intrahash = {dca40f8e780f1ba5fb0c9961a9403b09}, keywords = {Cache DATE Hardware Management}, text = {Tang, W., Gupta, R., and Nicolau, A.: `Power savings in embedded processors through decode filter cache'. Proc. Int. Conf. on Design Automation & Test in Europe, March 2002, pp. 443 -- 448}, timestamp = {2007-04-12T12:30:12.000+0200}, title = {Power Savings in Embedded Processors Through Decode Filter Cache}, url = {citeseer.ist.psu.edu/article/tang02power.html}, year = 2002 }