%0 Journal Article %1 Ungerer:2003:SPE:641865.641867 %A Ungerer, Theo %A Robic, Borut %A Silc, Jurij %C New York, NY, USA %D 2003 %I ACM %J ACM Comput. Surv. %K Hardware Hyperthreads MultiCore Processor SMT Threads %P 29--63 %R 10.1145/641865.641867 %T A Survey of Processors with Explicit Multithreading %U http://doi.acm.org/10.1145/641865.641867 %V 35 %X Hardware multithreading is becoming a generally applied technique in the next generation of microprocessors. Several multithreaded processors are announced by industry or already into production in the areas of high-performance microprocessors, media, and network processors.A multithreaded processor is able to pursue two or more threads of control in parallel within the processor pipeline. The contexts of two or more threads of control are often stored in separate on-chip register sets. Unused instruction slots, which arise from latencies during the pipelined execution of single-threaded programs by a contemporary microprocessor, are filled by instructions of other threads within a multithreaded processor. The execution units are multiplexed between the thread contexts that are loaded in the register sets.Underutilization of a superscalar processor due to missing instruction-level parallelism can be overcome by simultaneous multithreading, where a processor can issue multiple instructions from multiple threads each cycle. Simultaneous multithreaded processors combine the multithreading technique with a wide-issue superscalar processor to utilize a larger part of the issue bandwidth by issuing instructions from different threads simultaneously.Explicit multithreaded processors are multithreaded processors that apply processes or operating system threads in their hardware thread slots. These processors optimize the throughput of multiprogramming workloads rather than single-thread performance. We distinguish these processors from implicit multithreaded processors that utilize thread-level speculation by speculatively executing compiler- or machine-generated threads of control that are part of a single sequential program.This survey paper explains and classifies the explicit multithreading techniques in research and in commercial microprocessors.

@article{Ungerer:2003:SPE:641865.641867, abstract = {Hardware multithreading is becoming a generally applied technique in the next generation of microprocessors. Several multithreaded processors are announced by industry or already into production in the areas of high-performance microprocessors, media, and network processors.A multithreaded processor is able to pursue two or more threads of control in parallel within the processor pipeline. The contexts of two or more threads of control are often stored in separate on-chip register sets. Unused instruction slots, which arise from latencies during the pipelined execution of single-threaded programs by a contemporary microprocessor, are filled by instructions of other threads within a multithreaded processor. The execution units are multiplexed between the thread contexts that are loaded in the register sets.Underutilization of a superscalar processor due to missing instruction-level parallelism can be overcome by simultaneous multithreading, where a processor can issue multiple instructions from multiple threads each cycle. Simultaneous multithreaded processors combine the multithreading technique with a wide-issue superscalar processor to utilize a larger part of the issue bandwidth by issuing instructions from different threads simultaneously.Explicit multithreaded processors are multithreaded processors that apply processes or operating system threads in their hardware thread slots. These processors optimize the throughput of multiprogramming workloads rather than single-thread performance. We distinguish these processors from implicit multithreaded processors that utilize thread-level speculation by speculatively executing compiler- or machine-generated threads of control that are part of a single sequential program.This survey paper explains and classifies the explicit multithreading techniques in research and in commercial microprocessors.}, acmid = {641867}, added-at = {2011-12-26T14:45:36.000+0100}, address = {New York, NY, USA}, author = {Ungerer, Theo and Robi\v{c}, Borut and \v{S}ilc, Jurij}, biburl = {https://www.bibsonomy.org/bibtex/2e62e9ec37c2baf677382c33f1a9f7665/gron}, description = {A survey of processors with explicit multithreading}, doi = {10.1145/641865.641867}, interhash = {a5e55bed07b10674449edd3ffadef3cc}, intrahash = {e62e9ec37c2baf677382c33f1a9f7665}, issn = {0360-0300}, issue = {1}, journal = {ACM Comput. Surv.}, keywords = {Hardware Hyperthreads MultiCore Processor SMT Threads}, month = {March}, numpages = {35}, pages = {29--63}, publisher = {ACM}, timestamp = {2011-12-26T14:45:36.000+0100}, title = {A Survey of Processors with Explicit Multithreading}, url = {http://doi.acm.org/10.1145/641865.641867}, volume = 35, year = 2003 }