%0 Conference Paper %1 conf/memsys/CilasunMPSG22 %A Cilasun, Hüsrev %A Macaraeg, Chris %A Peng, Ivy Bo %A Sarkar, Abhik %A Gokhale, Maya B. %B MEMSYS %D 2022 %E Jacob, Bruce L. %I ACM %K dblp %P 8:1-8:11 %T FPGA-accelerated simulation of variable latency memory systems. %U http://dblp.uni-trier.de/db/conf/memsys/memsys2022.html#CilasunMPSG22 %@ 978-1-4503-9800-8

@inproceedings{conf/memsys/CilasunMPSG22, added-at = {2023-10-17T00:00:00.000+0200}, author = {Cilasun, Hüsrev and Macaraeg, Chris and Peng, Ivy Bo and Sarkar, Abhik and Gokhale, Maya B.}, biburl = {https://www.bibsonomy.org/bibtex/2731e22a959e2bf7d4352186aba0d6047/dblp}, booktitle = {MEMSYS}, crossref = {conf/memsys/2022}, editor = {Jacob, Bruce L.}, ee = {https://doi.org/10.1145/3565053.3565061}, interhash = {41f726cfce903caa574cd9368139887c}, intrahash = {731e22a959e2bf7d4352186aba0d6047}, isbn = {978-1-4503-9800-8}, keywords = {dblp}, pages = {8:1-8:11}, publisher = {ACM}, timestamp = {2024-04-09T17:30:03.000+0200}, title = {FPGA-accelerated simulation of variable latency memory systems.}, url = {http://dblp.uni-trier.de/db/conf/memsys/memsys2022.html#CilasunMPSG22}, year = 2022 }