%0 Conference Paper %1 conf/idt/MohamedSWS15 %A Mohamed, Nahla %A Safar, Mona %A Wahba, Ayman M. %A Salem, Ashraf %B IDT %D 2015 %I IEEE %K dblp %P 149-150 %T Automatic test pattern generation for virtual hardware model using constrained symbolic execution. %U http://dblp.uni-trier.de/db/conf/idt/idt2015.html#MohamedSWS15 %@ 978-1-4673-9994-4

@inproceedings{conf/idt/MohamedSWS15, added-at = {2024-05-07T00:00:00.000+0200}, author = {Mohamed, Nahla and Safar, Mona and Wahba, Ayman M. and Salem, Ashraf}, biburl = {https://www.bibsonomy.org/bibtex/26eeb8edac2e1872c471ec2d1c49b3ef4/dblp}, booktitle = {IDT}, crossref = {conf/idt/2015}, ee = {https://doi.org/10.1109/IDT.2015.7396755}, interhash = {47a12f6130941e4352f6f65434d3ae58}, intrahash = {6eeb8edac2e1872c471ec2d1c49b3ef4}, isbn = {978-1-4673-9994-4}, keywords = {dblp}, pages = {149-150}, publisher = {IEEE}, timestamp = {2024-05-13T09:05:55.000+0200}, title = {Automatic test pattern generation for virtual hardware model using constrained symbolic execution.}, url = {http://dblp.uni-trier.de/db/conf/idt/idt2015.html#MohamedSWS15}, year = 2015 }